AMIQ EDA

An IDE built for hardware description languages, compliant with IEEE 1800/1647/1076/1801. Offers real-time incremental compilation, cross-file navigation, on-the-fly syntax checking, refactoring, AI-assisted code generation, plus built-in UVM/OVM/VMM compliance checking and an OVM-to-UVM migration wizard.

• Supports SystemVerilog, Verilog, Verilog-AMS, UPF/CPF, PSS, VHDL and e
• Runs as an Eclipse platform plug-in or a VS Code extension, and integrates with NCSim, Specman, VCS and Questa
• Real-time incremental compilation, refactoring and AI-assisted code generation, with UML diagrams and signal-connection tracing

An add-on that connects to the simulator over a network socket, supporting remote debugging across machines — including encrypted-source scenarios. The Debug Perspective GUI brings breakpoints, call-stack navigation, live variable inspection and watch expressions together, so you never switch between editor and simulator windows.

• Integrates with all major simulators, with support for remote debugging and encrypted source
• Breakpoints, call stack, variable watches and simulation stepping, all from inside the editor

A SystemVerilog/Verilog static analyzer compliant with IEEE 1800 and UVM-aware. Catches non-standard syntax, problematic delta-cycle usage, overridden non-virtual methods, dead code and copy-paste duplication, with a custom-rule API and HTML reports — catching what a compiler alone would miss.

Generates documentation directly from Verilog, SystemVerilog, VHDL and e source — even sparsely commented code — via structural analysis. Produces block diagrams, UML class diagrams, register bitfield diagrams and WaveDrom-format waveform diagrams, with hyperlinked cross-references.

Implements the Model Context Protocol, acting as a grounding layer between AI agents/LLMs and your real HDL project across mixed-language codebases. Works with GitHub Copilot, Codex, Claude Code, Cursor and other leading AI assistants, deployable entirely on-premises with no outbound data transfer.