PermSRAM™ (OTP)
A non-volatile memory macro using standard CMOS processes with no extra mask, using a tamper-resistant charge-trap mechanism (not floating gate) with a non-rewritable hardware safety lock and automotive-grade data retention above 150°C.
- Process coverage from 180nm to 22nm and beyond
- Flexible macro sizing from 64bit to 512Kbit
- Built-in self-test circuit; every bit testable with standard equipment
- Partnerships with TSMC, IBM and UMC
