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An engineer reviews a holographic memory bit-cell grid above a standard chip package, with individual cells lighting up one by one as they are programmed
Semiconductor IP

NSCore

PermSRAM and TwinBit: non-volatile memory with no extra mask

  • OTP
  • MTP
  • NVM
  • Standard CMOS
  • TSMC
  • UMC

NSCore is a non-volatile memory (NVM) IP specialist positioned as a leading provider on cost and reliability, offering ready-to-use OTP/MTP memory design kits for ASIC and foundry customers in automotive, consumer and industrial segments. PermSRAM (OTP) is proven to 40nm, with macro capacity ranging from 64bit to 512Kbit.

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Products & capabilities

NSCore portfolio

One-time programmable

PermSRAM™ (OTP)

A non-volatile memory macro using standard CMOS processes with no extra mask, using a tamper-resistant charge-trap mechanism (not floating gate) with a non-rewritable hardware safety lock and automotive-grade data retention above 150°C.

  • Process coverage from 180nm to 22nm and beyond
  • Flexible macro sizing from 64bit to 512Kbit
  • Built-in self-test circuit; every bit testable with standard equipment
  • Partnerships with TSMC, IBM and UMC
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Multi-time programmable

TwinBit™ (MTP)

A multi-time programmable non-volatile macro on standard CMOS from 180nm to 55nm with no extra mask or process steps. Density 64K–512K bits, endurance beyond 10K program cycles, 10-year retention, operation up to 150°C, with a TSMC 0.18µm automotive-grade (AEC-Q100) option.

  • TSMC 180: 5.0V, 3.3V, BCD 5V
  • TSMC 110LP: 3.3V
  • TSMC 55HV: 5V
  • UMC 55DDC: 3.3V, 8Mb density
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Want to know more about NSCore?

We can arrange a vendor technical briefing, an evaluation licence and a deployment plan to get your team productive quickly.