The GOF family: netlist ECO that is both fast and verifiable
NanDigits builds GOF, an AI-powered netlist ECO platform: engineers describe a design change in plain language and AI agents implement and verify it automatically, turning hour-long manual ECO work into minutes. Functional ECO, schematic debug, RTL-to-netlist equivalence checking and ISO 26262-compliant formal fault coverage together close the loop.
Visit websiteAutomatic functional ECO using a reference netlist to fix an implementation netlist, with RTL-guided ECO to avoid re-synthesis. A built-in equivalence-checking engine self-verifies changes, with support for metal-only ECO and three automated methodologies that keep each patch minimal.
Visit websiteAn interactive netlist-to-schematic environment that traces drivers/loads in buffer/inv bypass mode, with clock/reset tree analysis and fanin/fanout cone visualization — apply ECOs by clicking directly on the schematic, no text editing or re-synthesis needed.
Visit websiteA built-in logic equivalence checker supporting Netlist-to-Netlist and RTL-to-Netlist modes, compliant with SystemVerilog 2017 and standard cell libraries, confirming function is preserved after ECO.
Visit websiteFormal fault-coverage analysis computing SPFM and LFM against ISO 26262 ASIL thresholds (e.g. ASIL D requires SPFM ≥90% and LFM ≥90%). Generates required stimulus automatically — no testbench needed — with cluster-computing support for parallel fault injection.
Visit websiteRuns GOF inside agentic AI CLIs such as Claude Code, Codex and opencode — the AI agent queries the GOF schematic engine to understand netlist topology and traces backward through the logic cone to find the optimal insertion point.
We can arrange a vendor technical briefing, an evaluation licence and a deployment plan to get your team productive quickly.