DisplayPort Transmitter Link Controller
Supports DP 2.1, DP 1.4a and eDP 1.5, HDCP 1.3/2.2/2.3, link rates of 1.62–20Gbps across 1/2/4 lanes, SST or MST, DSC 1.2 with FEC, and is silicon-proven across multiple ASIC/FPGA processes.
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Display IP supporting DisplayPort 2.1 and 8K stream compression
Trilinear Technologies is an IP core vendor specializing in DisplayPort technology, offering VESA-compliant, silicon-proven cores for automotive, consumer, medical, military and industrial display connectivity, including an automotive subsystem with an embedded RISC-V processor and ISO 26262 ASIL-B readiness. It offers DisplayPort transmitter and receiver link controllers alongside real-time Display Stream Compression codecs and HDCP content protection.
Visit websiteSupports DP 2.1, DP 1.4a and eDP 1.5, HDCP 1.3/2.2/2.3, link rates of 1.62–20Gbps across 1/2/4 lanes, SST or MST, DSC 1.2 with FEC, and is silicon-proven across multiple ASIC/FPGA processes.
Visit websiteA 5th-generation link controller core supporting DP 1.4–2.1 and eDP 1.5, link rates of 1.62–20Gbps across 1/2/4 lanes, up to 4 MST streams, and able to operate without a host CPU in low-complexity applications.
Visit websiteFully compliant with VESA DSC 1.2, decoding 4K at 30fps on FPGA and 8K at 30fps on ASIC, across resolutions from 480 up to 8K, with a technology-abstraction layer enabling FPGA-to-ASIC migration.
Visit websiteFully compliant with VESA DSC 1.2, supporting up to 8K streams (4K@30fps on FPGA, 8K@30fps on ASIC), with a low gate count, low latency and a stallable pipeline for rate management.
Visit websiteCompliant with HDCP 1.3/1.4 and 2.2/2.3, supporting source, sink and repeater modes with host-free operation after authentication, typically running at 400MHz on a 12nm process.
Visit websiteWe can arrange a vendor technical briefing, an evaluation licence and a deployment plan to get your team productive quickly.